The course is poorly designed. It FORCES you to self-study. This is entirely the fault of Hamzeh Roumani, who was the proponent of "learning-by-doing". The lab TAs were basically unreachable outside of the lab session, so we were basically on our own to figure out the labs. The RISC-V parts are easiest to get marks in. Verilog is veri-painful, and the pre-labs don't come with answers so you MUST figure it out, or you won't even be able to do the in-class labs.

Low-level assembly language, and hardware description language.

Nice, but not good at lecturing.

I wish I knew how much self-study was required, ESPECIALLY for the Verilog part of the course.